Three-Dimensional Field-Programmable Gate Arrays
نویسندگان
چکیده
Motivated b y improving FPGA performance, we propose a new three-dimensional (3U) FPGA architecture, along with a fabrication methodology. We analyze the expected manufacturing y i e l d , and raise seuera1 physical-design issues in the new 30 paradigm. Our techniques also have good implications for resource utilization, physical size, and power consumption.
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